Pluggable hardware architecture for verifying execution and securing untrusted computer systems

Background

The field of hardware security focuses on ensuring the integrity and reliability of computing systems, ranging from personal smartphones to enterprise servers. In today’s globalized manufacturing environment, modern computer systems are incredibly complex and typically assembled using components fabricated by numerous third-party vendors, often located offshore. This fragmented supply chain creates a critical need for robust security measures, as it becomes increasingly difficult to guarantee the integrity of the underlying hardware. Organizations and end-users require absolute assurance that their devices are free from subtle manufacturing bugs, unauthorized backdoors, or maliciously inserted hardware Trojans that could compromise sensitive data.

Despite the severe risks posed by compromised hardware, current security approaches remain fundamentally inadequate. Traditional verification techniques and hardware security modules frequently operate under the flawed assumption that the central processing unit and primary memory are inherently trustworthy. When these core components are compromised at the fabrication level, conventional defenses are easily bypassed, allowing malicious logic to manipulate execution or alter memory undetected. Furthermore, existing redundant execution schemes are typically deeply integrated into the chip design rather than being physically modular. This lack of separation prevents users from establishing an independent root of trust, leaving systems vulnerable to embedded attacks.

Technology

This hardware security solution utilizes a pluggable checker module acting as a secure gatekeeper between untrusted system components and the external environment. The CPU transmits execution traces to the module, which uses a lightweight verification engine and shadow registers to re-execute instructions in parallel. The architecture employs cryptographic shadow hashes for memory operations and basic block hashing to detect unauthorized code modifications. Furthermore, a barrier circuit and pending write buffer temporarily isolate external communications and peripheral writes. These are released only after successful verification, preventing malicious side effects from exiting the system.

This technology is uniquely differentiated by its ability to guarantee system integrity even when core hardware components contain manufacturing bugs or hardware Trojans. Unlike traditional security modules that rely on a trusted CPU, this architecture assumes all commodity hardware is untrusted. It isolates the root of trust into a simple, swappable, and independently verifiable off-chip module. Additionally, its dependence-free parallel execution allows a slower, simpler module to seamlessly keep pace with high-speed CPUs without significant performance degradation. By physically blocking external communication if anomalies are detected or the module is removed, it provides a highly robust, user-supplied hardware root of trust.

Benefits

• Establishes a Hardware Root of Trust: Secures computing systems built with untrusted, third-party, or commodity components, effectively mitigating risks from hardware Trojans, backdoors, and manufacturing bugs.
• Prevents Malicious Side Effects: Utilizes a barrier circuit and pending write buffer to isolate external communications, ensuring no unverified data or unauthorized peripheral writes can leave the system.
• Ensures Code and Data Integrity: Detects unauthorized code injection, memory manipulation, and incorrect arithmetic execution using cryptographic shadow hashes and basic block hashing.
• Maintains High System Performance: Employs dependence-free parallel execution verification, allowing a lightweight, slower checker module to keep pace with fast, complex CPUs with minimal performance overhead (under 5%).
• Modular and Upgradable Design: Features a pluggable, swappable architecture that allows users to easily integrate a simple, independently verifiable security module sourced from a trusted manufacturer.

Applications

• Secure military computing systems
• Critical infrastructure control systems
• Secure cloud computing infrastructure
• Financial transaction hardware verification
• Untrusted edge device security

Additional info

This hardware architecture utilizes a pluggable checker module to verify execution traces from untrusted CPUs. It employs a parallel verification engine with shadow registers and cryptographic hashes to ensure memory and code integrity. A barrier circuit and pending write buffer isolate external communications, releasing data only after successful validation. This modular gatekeeper prevents unauthorized side effects, establishing a hardware root of trust between untrusted components and the external environment.